Phase-locked Loop Engineering Handbook For Integrated Circuits
by Stanley J. Goldman /
2007 / English / PDF
12.7 MB Download
ICs for microprocessors, DSPs, microcontrollers, and telecommunications are increasingly demanding higher frequencies ranging from 200 to 4000 MHz. Monolithic PLLs can meet these demands, but properly designing new monolithic PLLs is a demanding, complex activity. To guide you through design, simulation, and troubleshooting, turn to this collection of practical solutions, SPICE listings, simulation techniques, and testing set-ups.
Systems designers are requiring that more and more functions be integrated onto a single chip. So you can meet these challenging requirements, this book explains how you can design PLLs so they are isolated from other circuits on a chip, consume minimal power, occupy small die areas, use small value capacitors, and avoid the need for inductors. It gives you all the transistor-level details for designing today's ICs and provides SPICE simulations and methods for verifying performance. This easy-to-reference handbook also thoroughly covers traditional PLL design and development.
